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PN Junction Diode

FDChargeDiode
2026-09-15 16:30:00

Preface

A PN junction diode is a two-terminal device formed by the contact between a p-type semiconductor and an n-type semiconductor. Its core principle is that the PN junction forms a depletion region and a built-in voltage under thermal equilibrium, thereby exhibiting unidirectional conductivity. When a forward bias is applied, the barrier is lowered and the diffusion current grows exponentially; under reverse bias, the barrier is raised and only a small reverse saturation current exists. Compared with traditional vacuum tubes, PN junction diodes offer advantages such as small size, low power consumption, fast response, and ease of integration, and are widely used in rectification, switching, voltage regulation, photodetection, and other fields. This example uses the finite-difference charge transport (FDCharge) solver to model and simulate an ideal silicon PN junction diode, successfully obtaining key parameters including the band structure, built-in voltage, depletion region width, current-voltage characteristics, and junction capacitance, and verifying the consistency between the simulation results and the analytical model.

diagram

Simulation Settings

Structure Model

The PN junction diode is composed of silicon (Si) and aluminum (Al). Si is the semiconductor substrate of the device and the core medium for all carrier generation, transport, and recombination calculations; Al serves as the electrodes, forming the emitter and the base, respectively. To establish a built-in electric field, the entire Si region is uniformly doped with an N-type dopant (nepi), and a P-type dopant (pwell) is introduced below the emitter to control the carrier transport behavior, as shown in the table below.

Doping Region Doping Type Concentration
nepi n 1×1015 cm−31 \times 10^{15}\ \text{cm}^{-3}
pwell p 1×1017 cm−31 \times 10^{17}\ \text{cm}^{-3}

In this example, an ideal PN junction diode is simulated. In the material settings, the semiconductor uses defect-free Si_ideal, neglecting recombination mechanisms such as SRH recombination, Auger recombination, and Radiative recombination. The specific parameters and settings are shown in the figure below.

Si_ideal

Simulation Results

Band Structure

Before extracting the built-in voltage and the depletion region width, the PN junction must be brought into thermal equilibrium. Open the attached PN_junction_diode.mpps project and set both the emitter and base voltages to 0 V, i.e., no external bias, as shown in the figure below. At this point, the Fermi level of the device remains flat throughout the structure, and the band bending is entirely caused by the built-in electric field.

voltage

Run the simulation at zero bias. After the simulation, the band structure of the silicon substrate can be viewed in FDCharge::Charge Monitor::Bandstructure, including the conduction band (EcE_{\text{c}}), the valence band (EvE_{\text{v}}), and the intrinsic Fermi level (EiE_{\text{i}}). Run the PN_junction_diode_equilibrium.msf script, which will plot EiE_{\text{i}}, as shown below. It can be seen that the band remains flat in the neutral regions of the p-type and n-type regions, while significant band bending occurs in the depletion region. The total height of the band bending corresponds to the built-in voltage (VbiV_{\text{bi}}), and the width of the bending region corresponds to the depletion region width (WW).

bandstructure_Ei

Built-in Voltage

The built-in voltage VbiV_{\text{bi}} is defined as the difference between two energy levels in the n-type and p-type materials, expressed in eV. The built-in voltage already exists in the absence of an external voltage and does not produce a current. For a PN junction with ideal ohmic contacts, the built-in voltage is independent of the junction distribution. Assuming that the distance between the junction and the contacts is sufficient to establish local thermal equilibrium in the p-type and n-type regions, the built-in voltage VbiV_{\text{bi}} can be determined by:

Vbi=kTqln⁡(NANDni2)V_{\text{bi}} = \frac{kT}{q} \ln\left(\frac{N_{\text{A}} N_{\text{D}}}{n_{\text{i}}^2}\right)

where kk is the Boltzmann constant, TT is the temperature, qq is the elementary charge, NAN_{\text{A}} is the acceptor concentration in the p-type region, NDN_{\text{D}} is the donor concentration in the n-type region, and nin_{\text{i}} is the intrinsic carrier concentration.

According to the simulation settings, NA=1017 cm−3N_{\text{A}} = 10^{17}\ \text{cm}^{-3}, ND=1015 cm−3N_{\text{D}} = 10^{15}\ \text{cm}^{-3}, ni=1.055×1010 cm−3n_{\text{i}} = 1.055 \times 10^{10}\ \text{cm}^{-3}, and T=300 KT = 300\ \text{K}. Substituting these into the above equation and taking kT/q=0.025860 eVkT/q = 0.025860\ \text{eV}, the theoretical value of the built-in voltage is approximately 0.7117 eV0.7117\ \text{eV}. The PN_junction_diode_equilibrium.msf script calculates the simulated built-in voltage as Vbi=0.711294 eVV_{\text{bi}} = 0.711294\ \text{eV}, as shown below, which agrees well with the theoretical value.

Depletion Region Width

When a abrupt junction is formed, the depletion region width WW can be predicted using the full depletion approximation:

W=[2εVbiq(NA+NDNAND)]1/2W = \left[\frac{2\varepsilon V_{\text{bi}}}{q} \left(\frac{N_{\text{A}} + N_{\text{D}}}{N_{\text{A}} N_{\text{D}}}\right)\right]^{1/2}

where ε\varepsilon is the permittivity of the material. This expression is based on the following assumptions:

  • The dopants are fully ionized;
  • The junction is an abrupt junction;
  • The carrier concentration in the space charge region is neglected (NA≫pN_{\text{A}} \gg p and ND≫nN_{\text{D}} \gg n).

In this example, NA≫NDN_{\text{A}} \gg N_{\text{D}}, and the space charge layer is mainly distributed on the more lightly doped side, so the above expression can be simplified to:

W≈Wn=[2εVbiq(1ND)]1/2W \approx W_{\text{n}} = \left[ \frac{2\varepsilon V_{\text{bi}}}{q} \left( \frac{1}{N_{\text{D}}} \right) \right]^{1/2}

In the simulation, NA=1017 cm−3N_{\text{A}} = 10^{17}\ \text{cm}^{-3}, ND=1015 cm−3N_{\text{D}} = 10^{15}\ \text{cm}^{-3}, Vbi=0.712 eVV_{\text{bi}} = 0.712\ \text{eV}, and εr=11.7\varepsilon_{\text{r}} = 11.7. Substituting these into the above equation gives W=0.96 μmW = 0.96\ \text{μm}. The PN_junction_diode_equilibrium.msf script extracts and plots the conduction band energy, as shown in the figure, and also calculates the simulated depletion region width as W=1.1 μmW = 1.1\ \text{μm}. The difference between the theoretical and simulated values arises because the full depletion approximation is not sufficiently accurate: electrons and holes still exist within the space charge layer, and their concentrations are quite significant near the edges of this region, compensating the ionized dopant charges and thereby broadening the space charge layer.

depletion_width

Current-Voltage Characteristics

Assuming that recombination in the space charge region can be neglected, the diode equation can be derived based on the description of carrier injection current through the PN junction:

I=qA[DpLppn+DnLnnp](eqV/(kT)−1)=I0(eqV/(kT)−1)I = qA \left[ \frac{D_{\text{p}}}{L_{\text{p}}} p_{\text{n}} + \frac{D_{\text{n}}}{L_{\text{n}}} n_{\text{p}} \right] (e^{qV/(kT)} - 1) = I_{\text{0}} (e^{qV/(kT)} - 1)

where AA is the junction area, VV is the applied voltage, Dn,pD_{\text{n,p}} are the diffusion coefficients, Ln,pL_{\text{n,p}} are the diffusion lengths, and I0I_{\text{0}} is the reverse saturation current, expressed in terms of the minority carrier hole concentration pnp_{\text{n}} in the n-type region and the minority carrier electron concentration npn_{\text{p}} in the p-type region.

Run the PN_junction_diode_iv.msf script to obtain the forward current-voltage characteristics of the diode. The script sets the emitter bias from 0.05 ~ 0.5 V, automatically runs the simulation to extract and plot the emitter current II, and sets the y-axis scale to logarithmic, with the results shown below.

IV

When the emitter bias is positive, the diode is forward-biased and the current grows exponentially with the bias:

I=I0(eqV/ηkT−1)≈I0eqV/ηkTI = I_{\text{0}} \left( e^{qV/\eta kT} - 1 \right) \approx I_0 e^{qV/\eta kT}

where η\eta is the ideality factor. Taking the logarithm of the above equation shows that in logarithmic coordinates log⁡10(I)∝V\log_{10}(I) \propto V, i.e., the slope of the curve should be constant, which is consistent with the theoretical result.

Junction Capacitance

Due to the charge accumulation at the depletion layer, the PN junction has a capacitance, defined as:

C=dQdVR[F/cm]C = \frac{dQ}{dV_{\text{R}}} \quad [\text{F/cm}]

For an ideal PN junction, the capacitance can be calculated by:

C=qεsNAND2(Vbi+VR)(NA+ND)C = \sqrt{\frac{q\varepsilon_{\text{s}} N_{\text{A}} N_{\text{D}}}{2(V_{\text{bi}} + V_{\text{R}})(N_{\text{A}} + N_{\text{D}})}}

When NA≫NDN_{\text{A}} \gg N_{\text{D}}, this expression can be simplified to:

C=qεsND2(Vbi+VR)C = \sqrt{\frac{q\varepsilon_{\text{s}} N_{\text{D}}}{2(V_{\text{bi}} + V_{\text{R}})}}

Run the PN_junction_diode_capacitance.msf script, which sets the emitter bias from -0.2 ~ -4 V, automatically runs the simulation, and calculates the variation of the junction capacitance with the bias voltage. In addition, the theoretical capacitance CjC_{\text{j}} is calculated based on the above simplified expression, as shown in the figure. It can be seen that the simulation results CnC_{\text{n}} and CpC_{\text{p}} essentially coincide, and the theoretical value CjC_{\text{j}} and the simulation curves all decrease with increasing reverse bias, showing the same trend. The theoretical capacitance is slightly lower than the simulation results because the above formula is based on the full depletion approximation, i.e., it assumes that the carriers in the depletion region are completely depleted and that the carrier concentration at the edge of the depletion region changes abruptly. In the actual simulation, however, there is a transition distribution of carrier concentration at the edge of the depletion region, and the contribution of the p-type side to the space charge layer is not strictly zero.

capacitance